Description: This variable indicates the port status. It is a bit map represented as a sum; therefore it can represent multiple failures. This variable is only significant for CIG boards.

The bit positions are :

1 : adnAeiPortOOS out-of-synchronization 4 : adnAeiPortNFOF network FIFO overflows 8 : adnAeiPortIEMRAMP BGIEM chip RAM parity errors 16 : adnAeiPortCECH corrected errors in cell header 32 : adnAeiPortUCECH uncorrected errors in cell header 64 : adnAeiPortCRCMA CRC errors on payload field of MA1 (Active Maintenance type 1) cells 128 : adnAeiPortCRCSIC CRC errors on payload field of SIC (Self Identified Cell) cells 256 : adnAeiPortNPE parity errors on payload 4096 : adnAeiPortNMA1 no active maintenance cell received 16384 : adnAeiPortEMA1 active maintenance cell received with error indication 131072 : adnAeiPortNSFOF network signalling FIFO overflow 262144 : adnAeiPortNFWF network FIFO write failure 524288 : adnAeiPortSFWF signalling FIFO write failure 1048576 : adnAeiPortNSFRF network signalling FIFO read failure 4194304 : adnAeiPortUSFRF user signalling FIFO read failure 8388608 : adnAeiPortUFWF user FIFO write failure 16777216 : adnAeiPortUSFOF user signalling FIFO overflow 33554432 : adnAeiPortNICI cells received on non-active ICI (Internal Communication Interface) 67108864 : adnAeiPortNCRC CRC errors detected on network side 134217728 : adnAeiPortNAAL AAL (ATM Adaptation Layer) sequence error on network side 268435456 : adnAeiPortUCRC CRC errors detected on user side 536870912 : adnAeiPortUAAL AAL sequence error on user side 2147483648: adnAeiPortSFIFO load sharing FIFO overflow

N.B.: This variable is significant when the operational state of the port is enabled. When there is no port error, this variable has the value 0.