Wellfleet-HWMO-MIB

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Category: Wellfleet BayNetworks System Management

Description: Manages Wellfleet hardware module operations including reset events and diagnostic status.

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What Is Wellfleet-HWMO-MIB?

Wellfleet-HWMO-MIB is a vendor MIB from Wellfleet Communications (later Bay Networks/Nortel) covering hardware module operations on Wellfleet routers, i.e. the physical slot/module-level control and diagnostic layer of the chassis. It exposes configuration and event data such as module reset requests, reset event history, and hardware diagnostic/self-test status per slot. Its monitoring focus is directly on hardware health: an operator watches for unexpected module resets, failed diagnostics, or a module reporting a non-operational state, which are strong indicators of a failing card or backplane issue in a modular chassis router. It is a self-contained vendor MIB with no strong dependency on other standard MIBs beyond general chassis/entity conventions. It is typically deployed on legacy modular Wellfleet/Bay Networks router chassis where individual line/CPU modules need remote hardware diagnostic visibility. Engineers can download the Wellfleet-HWMO-MIB file directly to load it into their MIB browser.

IPNetwork Monitor allows you to monitor SNMP objects defined in Wellfleet-HWMO-MIB. Use the built-in SNMP Monitoring Browser to explore available variables, view their current values and descriptions, and select the objects you want to monitor. You can then create SNMP monitors, configure thresholds, and receive alerts when monitored values change.

Supported Devices

Wellfleet/Bay Networks modular router chassis
legacy enterprise backbone routers

Monitoring Examples

An administrator would poll the hardware module status and reset-event objects per chassis slot to confirm all installed modules are operational, and an unexpected reset-event count increment or a module reporting a failed self-test would reveal a flaky card that needs physical reseating or replacement. No sample objects were listed in the source excerpt, so specific table/object names are inferred from the stated hardware reset/diagnostic purpose rather than taken verbatim from the MIB.

What Can Be Monitored

module reset events
hardware diagnostic/self-test status
per-slot module operational state
reset event history

Imported Objects

From RFC-1212

OBJECT-TYPE

From Wellfleet-COMMON-MIB

wfHardwareConfig

OBJECT-IDENTITY

OIDs

OID symbolic	OID numeric	Type	Access	Description
wfMod	1.3.6.1.4.1.18.3.1.3
INT wfModState	1.3.6.1.4.1.18.3.1.3.1	INTEGER	not-accessible	State of this record
INT wfModSlot	1.3.6.1.4.1.18.3.1.3.2	INTEGER	not-accessible	Instance of this record
INT wfModIdOpt	1.3.6.1.4.1.18.3.1.3.3	INTEGER	not-accessible	actual module ID and Option
INT wfModRev	1.3.6.1.4.1.18.3.1.3.4	INTEGER	not-accessible	actual module Revision
INT wfModProm	1.3.6.1.4.1.18.3.1.3.5	INTEGER	not-accessible	module PROM
INT wfModMidr	1.3.6.1.4.1.18.3.1.3.6	INTEGER	not-accessible	module ID register
INT wfModMled	1.3.6.1.4.1.18.3.1.3.7	INTEGER	not-accessible	module LED register
INT wfModMisr	1.3.6.1.4.1.18.3.1.3.8	INTEGER	not-accessible	module MISR register
INT wfModSnprom	1.3.6.1.4.1.18.3.1.3.9	INTEGER	not-accessible	module SNPROM
OCT wfModMadr1	1.3.6.1.4.1.18.3.1.3.10	OCTET STRING	not-accessible	SNPROM MAC address connector 1
OCT wfModMadr2	1.3.6.1.4.1.18.3.1.3.11	OCTET STRING	not-accessible	SNPROM MAC address connector 2
OCT wfModMadr3	1.3.6.1.4.1.18.3.1.3.12	OCTET STRING	not-accessible	SNPROM MAC address connector 3
OCT wfModMadr4	1.3.6.1.4.1.18.3.1.3.13	OCTET STRING	not-accessible	SNPROM MAC address connector 4
INT wfModLance1	1.3.6.1.4.1.18.3.1.3.14	INTEGER	not-accessible	LANCE line 1
INT wfModLance2	1.3.6.1.4.1.18.3.1.3.15	INTEGER	not-accessible	LANCE line 2
INT wfModMk50251	1.3.6.1.4.1.18.3.1.3.16	INTEGER	not-accessible	MK5025 line 1
INT wfModMk50252	1.3.6.1.4.1.18.3.1.3.17	INTEGER	not-accessible	MK5025 line 2
INT wfModMk50253	1.3.6.1.4.1.18.3.1.3.18	INTEGER	not-accessible	MK5025 line 3
INT wfModMk50254	1.3.6.1.4.1.18.3.1.3.19	INTEGER	not-accessible	MK5025 line 4
INT wfModSicr	1.3.6.1.4.1.18.3.1.3.20	INTEGER	not-accessible	SYNC interface control register
INT wfModSbrr	1.3.6.1.4.1.18.3.1.3.21	INTEGER	not-accessible	SYNC baudrate register
INT wfMod8530	1.3.6.1.4.1.18.3.1.3.22	INTEGER	not-accessible	8530 DUART
INT wfModCar	1.3.6.1.4.1.18.3.1.3.23	INTEGER	not-accessible	CAM assembly register
INT wfModDefaA	1.3.6.1.4.1.18.3.1.3.24	INTEGER	not-accessible	DEFA A chip
INT wfModCamALock	1.3.6.1.4.1.18.3.1.3.25	INTEGER	not-accessible	CAM A lock
INT wfModCamAUnlock	1.3.6.1.4.1.18.3.1.3.26	INTEGER	not-accessible	CAM A unlock
INT wfModDefaB	1.3.6.1.4.1.18.3.1.3.27	INTEGER	not-accessible	DEFA B chip
INT wfModCamBLock	1.3.6.1.4.1.18.3.1.3.28	INTEGER	not-accessible	CAM B lock
INT wfModCamBUnlock	1.3.6.1.4.1.18.3.1.3.29	INTEGER	not-accessible	CAM B unlock
INT wfModIlacc1	1.3.6.1.4.1.18.3.1.3.30	INTEGER	not-accessible	ILACC line 1
INT wfModIlacc2	1.3.6.1.4.1.18.3.1.3.31	INTEGER	not-accessible	ILACC line 2
INT wfModIlacc3	1.3.6.1.4.1.18.3.1.3.32	INTEGER	not-accessible	ILACC line 3
INT wfModIlacc4	1.3.6.1.4.1.18.3.1.3.33	INTEGER	not-accessible	ILACC line 4
INT wfModTms3801	1.3.6.1.4.1.18.3.1.3.34	INTEGER	not-accessible	TOKEN ring chip line 1
INT wfModTms3802	1.3.6.1.4.1.18.3.1.3.35	INTEGER	not-accessible	TOKEN ring chip line 2
INT wfModTocr	1.3.6.1.4.1.18.3.1.3.36	INTEGER	not-accessible	TOKEN control register
INT wfModTsra	1.3.6.1.4.1.18.3.1.3.37	INTEGER	not-accessible	TOKEN source route accelerator
INT wfModMuxram1	1.3.6.1.4.1.18.3.1.3.38	INTEGER	not-accessible	T1 mux RAM active
INT wfModMuxram2	1.3.6.1.4.1.18.3.1.3.39	INTEGER	not-accessible	T1 mux RAM inactive
INT wfModTicr	1.3.6.1.4.1.18.3.1.3.40	INTEGER	not-accessible	T1 interface control register
INT wfModFramer1	1.3.6.1.4.1.18.3.1.3.41	INTEGER	not-accessible	T1 framer line 1
INT wfModFramer2	1.3.6.1.4.1.18.3.1.3.42	INTEGER	not-accessible	T1 framer line 2
INT wfModFsi1	1.3.6.1.4.1.18.3.1.3.43	INTEGER	not-accessible	FDDI FSI line 1
INT wfModMac1	1.3.6.1.4.1.18.3.1.3.44	INTEGER	not-accessible	FDDI MAC line 1
INT wfModElmA1	1.3.6.1.4.1.18.3.1.3.45	INTEGER	not-accessible	FDDI ELM A line 1
INT wfModElmB1	1.3.6.1.4.1.18.3.1.3.46	INTEGER	not-accessible	FDDI ELM B line 1
INT wfModMCR1	1.3.6.1.4.1.18.3.1.3.47	INTEGER	not-accessible	FDDI Module control register line 1
INT wfModHssiFsi1	1.3.6.1.4.1.18.3.1.3.48	INTEGER	not-accessible	HSSI FSI line 1
INT wfModHssiFsi2	1.3.6.1.4.1.18.3.1.3.49	INTEGER	not-accessible	HSSI FSI line 2
INT wfModHssiUga1	1.3.6.1.4.1.18.3.1.3.50	INTEGER	not-accessible	HSSI UGA-330-2 line 1
INT wfModHssiUga2	1.3.6.1.4.1.18.3.1.3.51	INTEGER	not-accessible	HSSI UGA-330-2 line 2
INT wfModHicr	1.3.6.1.4.1.18.3.1.3.52	INTEGER	not-accessible	HSSI Control Register address
INT wfModHicrData	1.3.6.1.4.1.18.3.1.3.53	INTEGER	not-accessible	HSSI Last value written to the HICR
INT wfModHlsr	1.3.6.1.4.1.18.3.1.3.54	INTEGER	not-accessible	HSSI Line Status Register address
INT wfModHlsrData	1.3.6.1.4.1.18.3.1.3.55	INTEGER	not-accessible	HSSI Last value read from HLSR
INT wfModMCR0	1.3.6.1.4.1.18.3.1.3.56	INTEGER	not-accessible	Module Control Register 0
INT wfModCcr0	1.3.6.1.4.1.18.3.1.3.58	INTEGER	not-accessible	Command Control Register 0
INT wfModCcr1	1.3.6.1.4.1.18.3.1.3.59	INTEGER	not-accessible	Command Control Register 1
INT wfModFcr	1.3.6.1.4.1.18.3.1.3.60	INTEGER	not-accessible	Framer Command Register
INT wfModMar0	1.3.6.1.4.1.18.3.1.3.61	INTEGER	not-accessible	Munich action request 0
INT wfModMar1	1.3.6.1.4.1.18.3.1.3.62	INTEGER	not-accessible	Munich action request 1
INT wfModBert	1.3.6.1.4.1.18.3.1.3.63	INTEGER	not-accessible	BERT Register
INT wfModMgbc	1.3.6.1.4.1.18.3.1.3.64	INTEGER	not-accessible	Module Global bus-error clear
INT wfModClr0	1.3.6.1.4.1.18.3.1.3.65	INTEGER	not-accessible	Clear Munich interrupt 0
INT wfModClr1	1.3.6.1.4.1.18.3.1.3.66	INTEGER	not-accessible	Clear Munich interrupt 1
INT wfModCclk	1.3.6.1.4.1.18.3.1.3.67	INTEGER	not-accessible	Clear external clock interrupt
INT wfModCLoopup0	1.3.6.1.4.1.18.3.1.3.68	INTEGER	not-accessible	Clear Port 0 loop up interrupt
INT wfModCLoopup1	1.3.6.1.4.1.18.3.1.3.69	INTEGER	not-accessible	Clear Port 1 loop up interrupt
INT wfModCLoopdn0	1.3.6.1.4.1.18.3.1.3.70	INTEGER	not-accessible	Clear Port 0 loop down interrupt
INT wfModCLoopdn1	1.3.6.1.4.1.18.3.1.3.71	INTEGER	not-accessible	Clear Port 1 loop down interrupt
INT wfModDuart	1.3.6.1.4.1.18.3.1.3.72	INTEGER	not-accessible	8530 DUART
INT wfModLEDC	1.3.6.1.4.1.18.3.1.3.73	INTEGER	not-accessible	LED control register
OCT wfModMadr5	1.3.6.1.4.1.18.3.1.3.74	OCTET STRING	not-accessible	SNPROM MAC address connector 5 - IN Platform
INT wfModDefaC	1.3.6.1.4.1.18.3.1.3.75	INTEGER	not-accessible	DEFA C chip - IN Platform
INT wfModCamel1	1.3.6.1.4.1.18.3.1.3.76	INTEGER	not-accessible	IFDDI CAMEL line 1
INT wfModTms3803	1.3.6.1.4.1.18.3.1.3.77	INTEGER	not-accessible	TOKEN ring chip line 3
INT wfModTms3804	1.3.6.1.4.1.18.3.1.3.78	INTEGER	not-accessible	TOKEN ring chip line 4
INT wfModMusicSRT1	1.3.6.1.4.1.18.3.1.3.79	INTEGER	not-accessible	Music SRT chip line 1
INT wfModMusicSRT2	1.3.6.1.4.1.18.3.1.3.80	INTEGER	not-accessible	Music SRT chip line 2
INT wfModMusicSRT3	1.3.6.1.4.1.18.3.1.3.81	INTEGER	not-accessible	Music SRT chip line 3
INT wfModMusicSRT4	1.3.6.1.4.1.18.3.1.3.82	INTEGER	not-accessible	Music SRT chip line 4
INT wfModClrQ1Reset	1.3.6.1.4.1.18.3.1.3.83	INTEGER	not-accessible	Clear QUICC-1 reset
INT wfModClrQ2Reset	1.3.6.1.4.1.18.3.1.3.84	INTEGER	not-accessible	Clear QUICC-2 reset
INT wfModQ1Dram	1.3.6.1.4.1.18.3.1.3.85	INTEGER	not-accessible	QUICC-1 DRAM
INT wfModQ2Dram	1.3.6.1.4.1.18.3.1.3.86	INTEGER	not-accessible	QUICC-2 DRAM
INT wfModQ1DPram	1.3.6.1.4.1.18.3.1.3.87	INTEGER	not-accessible	QUICC-1 DPRAM
INT wfModQ2DPram	1.3.6.1.4.1.18.3.1.3.88	INTEGER	not-accessible	QUICC-2 DPRAM
INT wfModQ1StickyBit	1.3.6.1.4.1.18.3.1.3.89	INTEGER	not-accessible	QUICC-1 Sticky Bit Write Address base
INT wfModQ2StickyBit	1.3.6.1.4.1.18.3.1.3.90	INTEGER	not-accessible	QUICC-2 Sticky Bit Write Address base
INT wfModQ1Int7	1.3.6.1.4.1.18.3.1.3.91	INTEGER	not-accessible	QUICC-1 Interrupt COP high
INT wfModQ2Int7	1.3.6.1.4.1.18.3.1.3.92	INTEGER	not-accessible	QUICC-2 Interrupt COP high
INT wfModApplyQ1Reset	1.3.6.1.4.1.18.3.1.3.93	INTEGER	not-accessible	Apply QUICC-1 reset
INT wfModApplyQ2Reset	1.3.6.1.4.1.18.3.1.3.94	INTEGER	not-accessible	Apply QUICC-2 reset

RFC description

Wellfleet router hardware module management and operations MIB for monitoring CPU, memory, and general hardware status.

Start monitoring Wellfleet/Bay Networks modular router chassis, legacy enterprise backbone routers (module reset/diagnostic-status status) with a free 30-day trial of IPNetwork Monitor. Import MIBs, browse SNMP OIDs, create custom SNMP monitors, configure alerts, and monitor any SNMP-enabled network device from a single console.

Download Wellfleet-HWMO-MIB

What Is Wellfleet-HWMO-MIB?

Supported Devices

Monitoring Examples

What Can Be Monitored

This MIB depends on

Related MIBs

RFC description