Avici MIBs

MIB Reference — IPNetwork Monitor · Updated September 14, 2026

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6 modules from Avici

Avici Systems built large carrier-backbone core routers (the TSR/QSR terabit switch router line) in the late 1990s/2000s, and its MIBs in this database are a fully legacy set covering that single hardware family. Recurring subject matter is chassis and bay-level hardware health -- per-bay temperature thresholds and alarm LEDs, line-card/module operational state and uptime, internal switch-fabric packet/flit counters, and memory-pool fragmentation on router modules -- reflecting a modular chassis router built for continuous carrier-grade uptime. If you're supporting legacy Avici TSR/QSR backbone routers, this is where the chassis-inventory, fabric-throughput, and SONET-interface objects live, alongside route-server and process-CPU MIBs for the control plane. Since Avici Systems no longer exists as an independent company, expect these MIBs to describe end-of-life hardware rather than an actively maintained product line.

ModuleDescription
AVICI-BAY-MIBMonitors Avici Systems router chassis bay occupancy, card insertion events, and per-bay power status.
AVICI-MODULE-MIBManages line card and forwarding module inventory, operational state, and restart statistics on Avici backbone routers.
AVICI-SMIDefines the Avici Systems Structure of Management Information root OID hierarchy for all Avici enterprise MIBs.
AVICI-SONET-MIBMonitors SONET/SDH interface performance, path overhead, and alarm conditions on Avici backbone router line cards.
AVICI-SYSTEM-MIBOffers system-level management data for Avici backbone routers, covering uptime, software version, and overall health status.
AVICI-TCDefines textual conventions and enumerated types used across all Avici Systems backbone router management MIBs.