This integer holds the high-order 32 bits of a 64-bit counter of the total number of write cache misses for this cache volume, paired with the low-order cpqDaLogDrvCacheVolAccelNoOfWriteMissTotal value, and returns -1 if not applicable. An admin only needs this high-order half once the low-order total-miss counter has wrapped on an extremely busy write-heavy cache volume. For example, this becoming nonzero on a very high-traffic accelerator confirms the low-order write-miss total has wrapped around.