This Counter64 counts ATM CLP0 (high-priority) cells that were admitted but tagged as non-conforming for exceeding the circuit's committed cell rate while staying within its tolerance for excess traffic, the ATM-cell equivalent of circuitInFramesTagged applied specifically to the higher-priority CLP0 class. Seeing high-priority cells get tagged at all is more notable than seeing CLP1 traffic tagged, since it implies the circuit is bursting hard enough that even its protected traffic class is running above the committed rate. For example, a rising count here alongside otherwise well-behaved CLP1 traffic would flag that the circuit's guaranteed-priority traffic itself is exceeding its provisioned rate, worth reviewing against circuitFwdTDParam1.