The IP-DSLAM flow implementation allows multiple VLAN priorities to be mapped to the same
downstream flow queue (downstream flows are configured with downstreamFlowConfigTable).

Parameters in the downstreamFlowWredConfigTable are used to configure the discard probability
of packets with different VLAN priority in the same downstream flow. The mechanisms Weighted
Random Early Discard (WRED) is implemented to allow configuration of discard probability of
packet with different VLAN priority. The WRED mechanism works as an extention to the other
flow mechanisms in the IP-DSLAM.

                                               IP DSLAM
                  __________________________________________________________________
                 |                        ______                                    |
                 |                       (      )    ___  _ _ _ _                   |
                 |                  /--->( WRED )--->___Q3_|_|_|_|-->\              |
                 |                 /     (______)                     \             |
                 |                /       ______                       \            |
                 |               /       (      )    ___  _ _ _ _       \           |
                 |   ___________/___/--->( WRED )--->___Q2_|_|_|_|-->\___\_______   |
Aggregation      |  ( VLAN priority )    (______)                    (           )  |
  Network   ---->|->(    to flow    )     ______                     ( Scheduler )->|--> End-user
                 |  (____mapping____)    (      )    ___  _ _ _ _    (___________)  |
                 |              \   \--->( WRED )--->___Q1_|_|_|_|-->/   /          |
                 |               \       (______)                       /           |
                 |                \       ______                       /            |
                 |                 \     (      )    ___  _ _ _ _     /             |
                 |                  \--->( WRED )--->___Q0_|_|_|_|-->/              |
                 |                       (______)                                   |
                 |                                                                  |
                 | WRED = Weighted Random Early Discard                             |
                 |__________________________________________________________________|

The figure above illustrates where in the flow handling process the WRED is performed.

Weighted Random Early Discard (WRED) is needed to ensure that high priority packets are
favored over low priority packets when the downstream flow queue buffer usage gets close to
the maximum buffer limit. Maximum buffer limit is configured with dfcMaxQueueBuffers.

A flow has one downstream flow queue associated. All packets for this flow will be stored in
the downstream flow queue, disregarding the packets VLAN priority, until they in turn are
forwarded to the PVC in the subscriber line. The parameters wredBufferLimit and
wredDropProbability are used to configure the WRED mechanism.

dfcMaxQueueBuffers
        |
        V____________________________________________________________________________________
        | | | | | | | | | | | | | | | |                                | | | | | | | | | | | |
        | | | | | | | | | | | | | | | |     Downstream flow queue      | | | | | | | | | | | |
        |_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|________________________________|_|_|_|_|_|_|_|_|_|_|_|
        ^                       ^                                               V
        |                       |                                               |
wredBufferLimit(x)      wredBufferLimit(y)                             dfcMaxQueueBuffers
     (100%)                   (70%)                                    in steps of 1 buffer

In the figure above is illustrated that packets with VLAN priority X will not be discarded
until all buffers in the downstream flow queue are in use while the WRED mechanism will start
discarding packets with VLAN priority Y when 70% of the buffers in the downstream flow queue
are in use.

Valid from:                EDA 2.2 R3A