Description: Circuit pacing, as defined in the DLSw Standard, allows each of the two DLSw nodes on a circuit to control the amount of data the other is permitted to send to them. This object reflects the level of support the DLSw node has for this protocol. (1) means the node has no support for the standard circuit pacing flows; it may use RFC 1434+ methods only, or a proprietary flow control scheme. (2) means the node supports the standard scheme and can vary the window sizes it grants as a data receiver. (3) means the node supports the standard scheme but never varies its receive window size.